]> Release 8.1.03i Trace I.27Copyright (c) 1995-2005 Xilinx, Inc. All rights reserved.F:\Xilinx\bin\nt\trce.exe -ise Proto200.ise -intstyle ise -e 3 -l 3 -s 4 -xml main main.ncd -o main.twr main.pcf main.ncdmain.pcfxc3s200-4PRODUCTION 1.37 2005-11-04INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths option. All paths that are not constrained will be reported in the unconstrained paths section(s) of the report.TS_clk = PERIOD TIMEGRP "clk" 20 ns HIGH 50%;166190419.443-0.581vgacontrol0/syncgen0/ycnto_7vgacontrol0/syncgen0/ycnto_92.2870.0000.000vgacontrol0/syncgen0/ycnto_7vgacontrol0/syncgen0/ycnto_92SLICE_X18Y47.CLKclk_IBUFGSLICE_X18Y47.XQTcko0.576vgacontrol0/syncgen0/ycnto<7>vgacontrol0/syncgen0/ycnto_7SLICE_X19Y47.G1net50.606vgacontrol0/syncgen0/ycnto<7>SLICE_X19Y47.YTilo0.441vgacontrol0/syncgen0/ycnto<9>vgacontrol0/syncgen0/Ker2111SLICE_X19Y47.F4net20.022vgacontrol0/syncgen0/N211SLICE_X19Y47.CLKTckf0.061vgacontrol0/syncgen0/ycnto<9>vgacontrol0/syncgen0/ycnto_Eqn_91vgacontrol0/syncgen0/ycnto_91.0780.6281.706clk_IBUFG63.236.8-0.421vgacontrol0/syncgen0/xcnt_1vgacontrol0/syncgen0/xcnt_31.4280.0000.000vgacontrol0/syncgen0/xcnt_1vgacontrol0/syncgen0/xcnt_31SLICE_X2Y34.CLKclk_IBUFGSLICE_X2Y34.YQTcko0.576vgacontrol0/syncgen0/xcnt<0>vgacontrol0/syncgen0/xcnt_1SLICE_X3Y34.F3net50.370vgacontrol0/syncgen0/xcnt<1>SLICE_X3Y34.CLKTckf0.061vgacontrol0/syncgen0/xcnt<3>vgacontrol0/syncgen0/xcnt_Eqn_31vgacontrol0/syncgen0/xcnt_30.6370.3701.007clk_IBUFG63.336.7-0.368vgacontrol0/syncgen0/xcnt_1vgacontrol0/syncgen0/xcnt_21.4280.0000.000vgacontrol0/syncgen0/xcnt_1vgacontrol0/syncgen0/xcnt_21SLICE_X2Y34.CLKclk_IBUFGSLICE_X2Y34.YQTcko0.576vgacontrol0/syncgen0/xcnt<0>vgacontrol0/syncgen0/xcnt_1SLICE_X3Y34.G3net50.423vgacontrol0/syncgen0/xcnt<1>SLICE_X3Y34.CLKTckg0.061vgacontrol0/syncgen0/xcnt<3>vgacontrol0/syncgen0/xcnt_Eqn_21vgacontrol0/syncgen0/xcnt_20.6370.4231.060clk_IBUFG60.139.9TS_takt0 = PERIOD TIMEGRP "clk_sram" 13 ns HIGH 50%;000TS_takt0_CLKFX1 = PERIOD TIMEGRP "takt0_CLKFX1" TS_clk / 1.5 HIGH 50%;138614014.843-1.510sram0/dmem_out_2sram0/datawrite_0_Mem_214.84313.3330.000sram0/dmem_out_2sram0/datawrite_0_Mem_29SLICE_X7Y32.CLKclk_sramSLICE_X7Y32.YQTcko0.720sram0/dmem_out<3>sram0/dmem_out_2SLICE_X4Y33.G3net10.395sram0/dmem_out<2>SLICE_X4Y33.YTilo0.608N52data_i_bus_r<2>LogicTrst_SW1SLICE_X4Y32.G3net10.023N12011SLICE_X4Y32.YTilo0.608cpu0/datamem<26>data_i_bus_r<2>LogicTrstSLICE_X0Y20.G2net31.560data_i_bus_r<2>SLICE_X0Y20.XTif5x0.968mar0_A/mux_15_arest<1>_MUXF52mar0_A/arest<1>_rn_111_Fmar0_A/arest<1>_rn_111SLICE_X2Y23.F4net10.358mar0_A/mux_15_arest<1>_MUXF52SLICE_X2Y23.XTif5x0.968cpu0/datamem<2>cpu0/datamem<2>LogicTrst1_Gcpu0/datamem<2>LogicTrst1SLICE_X4Y22.G3net31.481cpu0/datamem<2>SLICE_X4Y22.YTilo0.608N167cpu0/datbus<2>4SLICE_X4Y20.G3net10.348N178SLICE_X4Y20.YTilo0.608cpu0/regC<2>cpu0/datbus<2>51SLICE_X4Y20.F4net120.023cpu0/datbus<2>SLICE_X4Y20.XTilo0.608cpu0/regC<2>cpu0/dataout<2>LogicTrst1SLICE_X11Y11.G3net61.717dataout<2>SLICE_X11Y11.YTilo0.551datamem_A<2>maw0_A/doutmem<2>15SLICE_X10Y1.G3net41.045data_o_bus<2>SLICE_X10Y1.YTilo0.608datamem_C<16>LogicTrst1/Odatamem_C<2>LogicTrst1R6.O1net11.010datamem_C<2>LogicTrst1/OR6.OTCLK1Tioock0.028data_io_0_sr<2>sram0/datawrite_0_Mem_26.8837.96014.843clk_sram46.453.6-1.279sram0/dmem_out_0sram0/datawrite_1_Mem_014.61213.3330.000sram0/dmem_out_0sram0/datawrite_1_Mem_08SLICE_X11Y30.CLKclk_sramSLICE_X11Y30.YQTcko0.720sram0/dmem_out<1>sram0/dmem_out_0SLICE_X9Y30.F4net10.368sram0/dmem_out<0>SLICE_X9Y30.XTilo0.551N12021data_i_bus_r<0>LogicTrst_SW1SLICE_X9Y33.G4net10.314N12021SLICE_X9Y33.YTilo0.551N12166data_i_bus_r<0>LogicTrstSLICE_X7Y24.G3net31.786data_i_bus_r<0>SLICE_X7Y24.XTif5x0.911mar0_A/mux_15_arest<1>_MUXF5mar0_A/arest<1>11_Fmar0_A/arest<1>11SLICE_X7Y25.F2net10.209mar0_A/mux_15_arest<1>_MUXF5SLICE_X7Y25.XTif5x0.911cpu0/datamem<0>cpu0/datamem<0>LogicTrst1_Gcpu0/datamem<0>LogicTrst1SLICE_X8Y21.G4net31.124cpu0/datamem<0>SLICE_X8Y21.YTilo0.608N335cpu0/datbus<0>3SLICE_X9Y18.G4net20.369N344SLICE_X9Y18.YTilo0.551cpu0/datamem<30>cpu0/dataout<0>LogicTrst1SLICE_X9Y15.G4net60.723dataout<0>SLICE_X9Y15.YTilo0.551datamem_A<16>maw0_A/doutmem<16>1SLICE_X10Y1.F3net32.439data_o_bus<16>SLICE_X10Y1.XTilo0.608datamem_C<16>LogicTrst1/Odatamem_C<16>LogicTrst1P2.O1net11.290datamem_C<16>LogicTrst1/OP2.OTCLK1Tioock0.028data_io_1_sr<0>sram0/datawrite_1_Mem_05.9908.62214.612clk_sram41.059.0-1.195sram0/dmem_out_26sram0/datawrite_0_Mem_214.52813.3330.000sram0/dmem_out_26sram0/datawrite_0_Mem_29SLICE_X0Y28.CLKclk_sramSLICE_X0Y28.YQTcko0.720sram0/dmem_out<27>sram0/dmem_out_26SLICE_X1Y26.G4net10.363sram0/dmem_out<26>SLICE_X1Y26.YTilo0.551data_i_bus_r<26>data_i_bus_r<26>LogicTrst_SW1SLICE_X1Y26.F3net10.015data_i_bus_r<26>LogicTrst_SW1/OSLICE_X1Y26.XTilo0.551data_i_bus_r<26>data_i_bus_r<26>LogicTrstSLICE_X0Y20.F3net31.399data_i_bus_r<26>SLICE_X0Y20.XTif5x0.968mar0_A/mux_15_arest<1>_MUXF52mar0_A/arest<1>_rn_111_Gmar0_A/arest<1>_rn_111SLICE_X2Y23.F4net10.358mar0_A/mux_15_arest<1>_MUXF52SLICE_X2Y23.XTif5x0.968cpu0/datamem<2>cpu0/datamem<2>LogicTrst1_Gcpu0/datamem<2>LogicTrst1SLICE_X4Y22.G3net31.481cpu0/datamem<2>SLICE_X4Y22.YTilo0.608N167cpu0/datbus<2>4SLICE_X4Y20.G3net10.348N178SLICE_X4Y20.YTilo0.608cpu0/regC<2>cpu0/datbus<2>51SLICE_X4Y20.F4net120.023cpu0/datbus<2>SLICE_X4Y20.XTilo0.608cpu0/regC<2>cpu0/dataout<2>LogicTrst1SLICE_X11Y11.G3net61.717dataout<2>SLICE_X11Y11.YTilo0.551datamem_A<2>maw0_A/doutmem<2>15SLICE_X10Y1.G3net41.045data_o_bus<2>SLICE_X10Y1.YTilo0.608datamem_C<16>LogicTrst1/Odatamem_C<2>LogicTrst1R6.O1net11.010datamem_C<2>LogicTrst1/OR6.OTCLK1Tioock0.028data_io_0_sr<2>sram0/datawrite_0_Mem_26.7697.75914.528clk_sram46.653.42clkclk19.4431810121180050591519.44351.432Sun May 04 02:13:43 2008TraceTrace Settings Peak Memory Usage: 127 MB