PROTO200 Project Status | |||
Project File: | Proto200.ise | Current State: | Programming File Generated |
Module Name: | main |
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No Errors |
Target Device: | xc3s200-4ft256 |
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254 Warnings |
Product Version: | ISE, 8.1.03i |
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So 4. Mai 03:17:46 2008 |
Device Utilization Summary | ||||
Logic Utilization | Used | Available | Utilization | Note(s) |
Total Number Slice Registers | 731 | 3,840 | 19% | |
Number used as Flip Flops | 707 | |||
Number used as Latches | 24 | |||
Number of 4 input LUTs | 3,327 | 3,840 | 86% | |
Logic Distribution | ||||
Number of occupied Slices | 1,918 | 1,920 | 99% | |
Number of Slices containing only related logic | 1,874 | 1,918 | 97% | |
Number of Slices containing unrelated logic | 44 | 1,918 | 2% | |
Total Number 4 input LUTs | 3,567 | 3,840 | 92% | |
Number used as logic | 3,327 | |||
Number used as a route-thru | 240 | |||
Number of bonded IOBs | 100 | 173 | 57% | |
IOB Flip Flops | 83 | |||
IOB Latches | 1 | |||
Number of Block RAMs | 12 | 12 | 100% | |
Number of GCLKs | 3 | 8 | 37% | |
Number of DCMs | 1 | 4 | 25% | |
Total equivalent gate count for design | 824,992 | |||
Additional JTAG gate count for IOBs | 4,800 |
Performance Summary | |||
Final Timing Score: | 10121 | Pinout Data: | Pinout Report |
Routing Results: | All Signals Completely Routed | Clock Data: | Clock Report |
Timing Constraints: | 2 Failing Constraints |
Detailed Reports | |||||
Report Name | Status | Generated | Errors | Warnings | Infos |
Synthesis Report | Current | So 4. Mai 01:49:09 2008 | 0 | 222 Warnings | 14 Infos |
Translation Report | Current | So 4. Mai 01:53:50 2008 | 0 | 0 | 1 Info |
Map Report | Current | So 4. Mai 01:54:07 2008 | 0 | 11 Warnings | 4 Infos |
Place and Route Report | Current | So 4. Mai 02:13:35 2008 | 0 | 12 Warnings | 2 Infos |
Static Timing Report | Current | So 4. Mai 02:13:43 2008 | 0 | 0 | 1 Info |
Bitgen Report | Current | So 4. Mai 02:15:25 2008 | 0 | 9 Warnings | 1 Info |